1. Related Field
The present patent application generally relates to link resiliency circuit (or "LRC") equipped serial storage architecture (or "SSA") storage subsystems and, more particularly, to a LRC equipped SSA storage subsystem having an SSA initiator and an intelligent backplane configured for the exchange of status and control information with the LRC.
2. Description of Related Art
Presently, many storage subsystems are based upon small computer systems interface (or "SCSI") architecture. Recently, however, considerable attention has been directed towards the development of storage subsystems based upon SSA. Generally, SSA-based storage subsystems are capable of providing higher level of performance, fault tolerance, data availability and connectivity than is possible with similar SCSI-based storage subsystems. SSA-based storage subsystems also offer reduced interface costs. For example, SSA-based storage subsystems require neither address switches nor discrete terminators.
SSA-based storage subsystems are arranged into a serial string of up to 128 devices, the ends of which are often connected to form a loop. Generally, such strings or loops include an SSA initiator and any number of SSA targets, most commonly, storage devices such as drives, which execute commands received from the SSA initiator, mounted in drive bays. Each of the devices included in a string or loop has first and second full duplex ports.
The drive bays of an SSA storage subsystem are linked together in series. Without the presence of an SSA drive at each drive bay, the SSA string or SSA loop would be open. Thus, a method of maintaining continuity of the SSA string or loop when an SSA drive is absent from a drive bay is needed. Continuity of the SSA string or loop may be achieved by use of a LRC. The LRC is capable of maintaining continuity of the SSA string or loop by linking around or healing a drive bay if a SSA drive is missing or otherwise not functioning. Thus, if an SSA drive fails in use, the LRC will interconnect the SSA drives on opposite sides of the failed SSA drive. It is important to note, however, that the failure of a drive located within a SSA string causes various types of link errors. For example, a message in transit when the drive fails may be lost. Link error recovery protocol (or "link ERP") provides a mechanism for recovering from the link error by attending to the retransmission of messages lost or corrupted due to the failure of an SSA drive.
While LRCs are capable of healing breaks in an SSA chain, they also can inadvertently prevent a full recovery from the break. More specifically, it is generally acknowledged that a certain amount of time is required for an SSA initiator to detect a link error. If an LRC responds too quickly in healing the break in the SSA chain, it may prevent the link error from being detected by the SSA initiator. Being unaware of the link error, the SSA initiator would not initiate link ERP, thereby preventing the recovery of those messages that were lost due to the link error.
Considerable debate has occurred as to the time period required for an SSA initiator to detect a link error. Currently, 1 millisecond is deemed sufficient. However, due to the immature nature of SSA, it is unknown if the 1 millisecond time period is adequate for all SSA configurations. Thus, it remains quite possible that the SSA initiator of certain LRC equipped SSA storage subsystems will be unable to detect link errors.
It can be readily seen from the foregoing that it would be desirable to provide an LRC equipped SSA storage subsystem having an SSA initiator and an intelligent backplane configured for the exchange of status and control information with the LRC such that the time period for the LRC to heal a break may be readily adjusted. It is, therefore, the object of this invention to provide such an SSA storage subsystem.